JMCPU - PCB002: Instruction decoder

Description

Run each microcode phase for a given instruction word. Triggers register inputs and outputs. The microcode handles the phase counter, condition bits (adder S23 and adder carry) as well as execution modes (normal, reset, busreq and interrupt).

Contains the 3 microcode ROM chips on ZIF sockets.

v1.0

Date: 2022-01-08

Schematic (PDF)

Gerber download

EasyEDA project download


Known issues

Validation process

Schematic

StepStatus ✓
Project name and folder
Matches main schematic
Component labels
Net labels and wires
All components updated
Components and nets check
Symbol design
JMC logo and QR code
Screw holes
Main decoupling capacitor
2 GND connectors
Headers match backplane reference
Sheet info
Simulator updated

PCB design

StepStatus ✓
File name
Units set to mil
Design rules check
Schematic synced
All components updated
Routing design recommendations
Board layout
Board size
Text size and orientation
Routing optimization pass

PCB fabrication

StepStatus ✓
Gerber generated
PCB built?
Components fit?
Components soldered?
Connectors fit?
First power on?
Functional tests?

Documentation

StepStatus ✓
Link to Schematic PDF
Link to Gerber
Link to EasyEDA export package
Pictures?
Assembly guide integration?