Decodes ADD_INAn and ADD_INBn and provide input signals for least significant byte of the adder board.
Decodes ADD_INAn and ADD_INBn and provide input signals for least significant byte of the adder board.
Date: 2022-01-09
Step | Status ✓ |
---|---|
Project name and folder | ✓ |
Matches main schematic | ? |
Component labels | ✓ |
Net labels and wires | ✓ |
All components updated | ✓ |
Components and nets check | ✓ |
Symbol design | ✓ |
JMC logo and QR code | ✓ |
Screw holes | ✓ |
Main decoupling capacitor | ✓ |
2 GND connectors | ✓ |
Headers match backplane reference | ✓ |
Sheet info | ✓ |
Simulator updated | ? |
Step | Status ✓ |
---|---|
File name | ✓ |
Units set to mil | ✓ |
Design rules check | ✓ |
Schematic synced | ✓ |
All components updated | ✓ |
Routing design recommendations | ✓ |
Board layout | ✓ |
Board size | ✓ |
Text size and orientation | ✓ |
Routing optimization pass | ✓ |
Step | Status ✓ |
---|---|
Gerber generated | ✓ |
PCB built | ? |
Components fit | ? |
Components soldered | ? |
Connectors fit | ? |
First power on | ? |
Functional tests | ? |
Step | Status ✓ |
---|---|
Link to Schematic PDF | ✓ |
Link to Gerber | ✓ |
Link to EasyEDA export package | ✓ |
Pictures | ? |
Assembly guide integration | ? |